1. Field
This disclosure relates generally to data processing systems, and more specifically, to preserving duty cycle when transmitting data.
2. Related Art
In a data processing system, a memory controller typically interfaces between a processing module and a memory, where the memory controller receives a write request and write data from the processing module and communicates the write request and write data to the memory. In some data processing systems, a dual data rate (DDR) memory system is utilized, where the memory controller transfers data to the memory on both the rising and falling edges of a transfer clock signal, also referred to as a data strobe signal.
The present invention is illustrated by way of example and is not limited by the accompanying figures, in which like references indicate similar elements, unless otherwise noted. Elements in the figures are illustrated for simplicity and clarity and have not necessarily been drawn to scale.